My research focuses on building microsystems and nanosystems. The general areas of resaerch are listed on my home page. Here is a listing of current and recent specific projects.

• 3DIC and interposer (2.5D) design. The design, and CAD support, for 3D (stacked) ICs and multi-chip packages, spanning architecture, CAD, test, validation and circuit design.
• Cortical Processing. Investigations into hardware concepts that can be used to implement cortical-like functions.
• Center for Advanced Electronics through Machine Learning (CAEML). This new Industry/Government/University Center focues on applying Machine Learning to problems in electronics design. This program is joing with UIUC and Ga Tech.
• AC powered circuits for RFID. Digital and analog circuits that can be powered off an AC supply. We are primarily exploring target applications in RFID.
• IRDS. Links to my activities as part of the International Roadmap for Devices and Systems (IRDS), formerly International Technology Roadmap for Semiconductors (ITRS). I am the editor of the Emerging Resarch Arhicitectures section of the Emerging Research Devices chpater. This site includes presentations at workshops I ran.
• Unified Memory Device. A new "unified" memory device that permits both a volatile bit and a non-volatile .
• Multimode Interconnect. Coding scheme to permit dramatic crosstalk reduction in electronic chip to chip interconnect. This in turn leads to dramatic reductions in packaging cost.
• AC Coupled Interconnect. Contactless, high bandwidth, highd-density, low-cost and low-power packaging structures and circuits for chip packaging, sockets and connectors.
• Hardware Acceleration for Automated Speech Recognition. Building accelerators for critical steps in speech recognition leads to dramatic improvements in power consumption, and performance. This project has morphoed into a broader project on cortical processing.
• Refreshable Braille Display. A full page refreshable tactile display based on ElectroActive Polymers. This project has been spun out of the Univesrity as Polymer Braille Inc.
• CAD for self-calibrating circuits. Computer Aided Design techniques to support the deisign Digital and analog circuits that can be powered off an AC supply. We are primarily exploring target applications in RF. This project has morphed into our activities within CAEML.
• On-chip interconnect. Using on-chip equalization for the design of low-power repeaterless global on-chip interconnect. Past work includes other techniques for low-power interconnect design, and development of on-chip measurement techniques. This project has morphed into my 2D and 3D projects.
• Network processor codesign. Methdologies and archictures for networking, mainly network security. This set of projects are complete..
• Chip-package codesign. Methdologies and tools for codesign of chips, packages, and multichip modules. Includes ongoing support for IO macromodeling, including Spice2Ibis. This project has morphed into an upcomong planned Center activity.