NC State University

IBIS Project

This emerging standard promises to deliver models earlier, and provide superior simulation performance and accuracy than has been possible using traditional signal integrity model development approaches. As digital system design engineers are increasingly challenged by higher clock speeds and special packaging, signal integrity simulation is becoming imperative. IBIS addresses fundamental simulation issues:

A Basic IBIS ModelA Basic IBIS Model

The IBIS (I/O Buffer Information Specification) is a consistent format that semiconductor vendors can use to specify the analog characteristics of input and output buffers. This essential information is readily transformed into accurate models by end users and simulation tool vendors. The resulting behavioral models allow users to perform high-speed, accurate signal-integrity simulations of their digital system interconnects.

NCSU's Spice-to-IBIS model generation utility has been used by the industry professionals and researchers alike to create IBIS models for a number of years now. S2IBIS requires a SPICE (most versions) netlist of the IO buffer and a command file (*.s2i) to generate IBIS models.

IBIS Standard Provides Early Models While Protecting Proprietary Information

Most existing I/O buffer model development methodologies are based on actual circuit designs. Such descriptions reveal detailed information not only about the buffer design, but also about the underlying, proprietary fabrication processes. In contrast, IBIS uses voltage-versus-current characteristics, along with additional circuit, package and timing information to describe the buffers. This form of data protects the semiconductor vendor's proprietary information about the design, and process technology while still providing a highly useful and accurate model for the end users.

"By standardizing on a non-proprietary method of specifying models, the industry has a win-win situation," states Jon Powell, product manager, transmission line tools at Quad Design. "Semiconductor companies can deliver the information once, EDA tools have a ready and easy source for models, and end users gain high-performance, accurate models."

Behavioral IBIS Models Are Easy to Generate and Offer Superior Performance

The data used to develop an IBIS model can be easily derived from simulations of the actual circuits or measured directly using commonly available laboratory equipment. This easily derivable data includes V-I curves for high- and low-output transitions; V-I curves for clamp diodes; high/low ramp times; component capacitance; and per-pin package resistance, inductance and capacitance. By simplifying the data collection and removing proprietary issues, the semiconductor vendors can provide IBIS models prior to, or at the same time as, the availability of first components.

Because IBIS models are behavioral, simulations run much faster than corresponding structural models. Speed improvements of 25 times are not uncommon. IBIS accomplishes this performance improvement without sacrificing accuracy by incorporating the specification of many non-linear effects of the I/O design, including package parasitics and forward-biased ESD protection diode effects.

"We have the opportunity to break open the logjam in model availability for signal integrity analysis by creating accurate, efficient models that can be delivered with the silicon," says Shiv Tasker, vice president and general manager, systems physical design group at Cadence Design Systems. "The availability of these models will have a major impact on how quickly new parts introduced by IC vendors will be designed into new products. It is therefore in the customers', and IC and EDA vendors' interest to actively encourage adoption of such critical standards as IBIS."

IBIS Models for LVDS and Differential Buffers

Other Sources of Information

IBIS Specifications

NCSU IBIS Publications

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